Advanced Compiler Construction

339.406 Mössenböck 2KV Tue 12:00 - 13:30 Room: K269D Start: 07.03.2023

This course is given on campus, but recordings from previous years can be viewed here

The course continues the course "Compilerbau" from the Bachelor's program. It concentrates on code generation for register machines as well as on compiler optimizations based on intermediate program representations. The lectures will only run until the beginning of June. The rest of the semester is reserved for a project in which you will build a small compiler for a register machine using the compiler generator Coco/R.

Prerequisite: Compilerbau (or a similar compiler construction course)

Note that Advanced Compiler Construction will be offered only every second year.

Contents

  1. Symbol table and separate compilation
    - Recap: objects, types, scopes
    - Separate compilation in a Pascal-like language
    - Separate compilation in Java

  2. Code generation for register machines
    - Intel IA-32 architecture
    - Design considerations
    - Code buffer management
    - Register allocation
    - Operands during code generation
    - Emitting machine instructions
    - Loading values and addresses
    - Code generation for expressions
    - Code generation for statements
    - Jumps
    - Code generation for control structures
    - Short-circuit evaluation of boolean expressions
    - Code generation for procedures
    - Contents of the object file

  3. Intermediate representations
    - Abstract syntax tree
    - Control-flow graph
    - Def-Use information
    - Dominator tree
    - Static Single Assignment Form (SSA form)

  4. Optimizations
    - Motivation
    - Simple optimizations
    - Copy Propagation
    - Common Subexpression Elimination
    - Dead Code Elimination
    - Procedure optimizations
    - Loop optimizations
    - Instruction Scheduling
    - Peephole optimization

  5. Register allocation
    - Simple register management
    - Register variables
    - Graph Coloring
    - Elimination of Phi instructions
    - Saving and restoring registers

Dates

Date Topic
07.03 Symbol Table ans Separate Compilation
14.03. Code Generation
21.03. Code Generation
28.03. Code Generation
18.04. Intermediate Representations
25.04. Intermediate Representations
02.05. Optimizations
11.05. Optimizations -- Video Recording --
16.05. Register Allocation
23.05. Register Allocation
13.06. Exam
27.06. Project submission

Handouts

The slide copies as well as other material can be downloaded from the Kusss or Moodle page of this course.

Literature

  • Aho A.V., Lam M., Sethi R., Ullman J.D.: Compilers -- Principles, Techniques, & Tools. 2nd edition, Addison Wesley, 2012
  • Cooper, K.D., Torczon, L.: Engineering a Compiler. 2nd edition, Morgan Kaufmann, 2012
  • Appel A. W.: Modern Compiler Implementation in Java. 2nd edition, Addison-Wesley, 2007
  • Muchnick, S.: Advanced Compiler Design and Implementation. Morgan Kaufmann, 2003
  • Wirth N.: Grundlagen und Techniken des Compilerbaus. Oldenbourg, 2008

Exam

There will be a written exam on Tuesday, June 13, 2023, 12:00-13:30 (without handouts). You should also do one of the projects described below.

Project

Since this is a combined course (KV) you should also do one of the following 2 projects in addition to the exam. The project is not mandatory. However, without the project, the best mark you can achieve is a 2 (gut). If you submit a correct project and if you have at least 40 out of 90 points in the exam your exam mark will be automatically raised by 1.

  • Project 1: Code Generation for a Register Machine
    Develop a compiler for a small programming language generating code for the Intel IA32 architecture. No intermediate representation is to be built. Also, register allocation should be done on the fly, i.e., without graph coloring.

  • Project 2: Compiler Optimizations on an IR
    Develop a compiler for a small programming language building an intermediate representation of the source program (CFG with instructions in SSA form) and performing certain optimizations on it. Optionally you can also implement a register allocator. Code generation is not required.

The project should be handed in on Tuesday, June 27, 2023 between 10:00 and 16:00. Please select a time slot under https://tinyurl.com/Project-ACC. You can present the solution either to me or to Sebastian Kloibhofer. You don't have to send us the source code but just show the solution and be prepared to answer questions regarding the implementation.

In both projects, the scanner and the parser are to be generated with the compiler generator Coco/R so that you can concentrate on other tasks.

For implementing the code generator you need a detailed specification of the IA32 architecture and its instruction encoding. You can find it here:

In order to load and run the code generated by your compiler (Project 1) you should use the following
- mini loader for Windows (source, executable) or
- mini loader for Linux (source (thanks to Gabriel Guldner))
as described in the project specification. If you compile the loader with Visual Studio you can use Visual Studio to inspect and debug the generated binary code.